Search results for "Logic optimization"

showing 2 items of 2 documents

FPGA-based embedded Logic Controllers

2014

In general case, reconfigurable logic controllers (RLC) are included into reactive digital embedded systems, carrying out control for several processes proceeding concurrently. The paper presents a practical application of a formal, rule-based specification language in Gentzen sequent logic, which is used as an intermediate textual description of a control interpreted Petri net. On the other hand exactly the same description serves also as logic design expressions, related with different versions of functionally equivalent concurrent state machine models, considered on Register Transfer Level. The symbolic rule-based specification of Petri net-based embedded Logic Controllers (LCs) can be s…

Finite-state machineSequential logicTheoretical computer scienceComputer scienceProgramming languageHardware description languageLogic familycomputer.software_genreProgrammable logic deviceLogic synthesiscomputerHardware_LOGICDESIGNRegister-transfer levelcomputer.programming_languageLogic optimization2014 7th International Conference on Human System Interactions (HSI)
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Optimal implementation of neural activation functions in programmable logic using fuzzy logic

2006

Abstract This work presents a methodology for implementing neural activation function in programmable logic using tools from fuzzy logic. This methodology will allow implementing these intrinsic non-linear functions using comparators and simple linear modellers, easily implemented in programmable logic. This work is particularized to the case of a hyperbolic tangent, the most common function in neural models, showing the excellent results yielded with the proposed approximation.

Sequential logicFunction block diagramNeuro-fuzzyArtificial neural networkComputer scienceCircuit designActivation functionLogic familyControl engineeringComplex programmable logic deviceFuzzy logicProgrammable logic arrayFuzzy electronicsProgrammable logic deviceLogic synthesisSimple programmable logic deviceLogic optimizationRegister-transfer levelIFAC Proceedings Volumes
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